

Efficiency


Transfer Protocol Summary
Protocol | Stage-in Success | Stage-in Failure | Stageout Success | Stageout Failure |
---|---|---|---|---|
hdfs | 41818 | 0 | 17182 | 2 |
Events | Units | |||||||||||||
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
category | total | read | written | total |
unmasked
Units which are not masked by lumi_mask.
If no mask has been specified, all units are unmasked. For more information see the
documentation.
|
written | merged |
stuck
Units which cannot be attempted because they are either failed or skipped, or their input is
a unit in a parent workflow that failed or was skipped.
If you want to increase skipping/failure thresholds so that the parent units are attempted
again, run lobster configure /my/working/directory and increase
threshold_for_failure and/or threshold_for_skipping
in the lobster.core.config.AdvancedOptions section. If the parent unit
finishes successfully, the stuck units will automatically be attempted. For more information
see the documentation on
updating
your configuration after the start of a run, and advanced configuration
options.
|
failed
Units for which the executable has not exited successfully more than
threshold_for_failure.
If you want to increase the failure threshold so that these units are attempted again, run lobster configure /my/working/directory and increase threshold_for_failure in the lobster.core.config.AdvancedOptions section. For more information see the documentation on updating your configuration after the start of a run, and advanced configuration options. |
skipped
Units for which accessing the input file has failed more than
threshold_for_skipping.
If you want to increase the skipping threshold so that these units are attempted again, run lobster configure /my/working/directory and increase threshold_for_skipping in the lobster.core.config.AdvancedOptions section. For more information see the documentation on updating your configuration after the start of a run, and advanced configuration options. |
left
Units which are available for processing but haven't been attempted yet:
left = unmasked - running - written - failed - skipped - stuck |
Progress | Merged | JSON |
output_ttHJet_dim6TopMay20GST_all22WCsStartPtCheck_run2_UL17 | 0 | 262 286 | 262 286 | 1 403 | 1 403 | 1 403 | 1 403 | 0 | 0 | 0 | 0 | 100.0 % | 100.0 % | processed |
output_tllq4fNoSchanWNoHiggs0p_dim6TopMay20GST_all22WCsStartPtCheck_run6_UL17 | 0 | 200 000 | 200 000 | 400 | 400 | 400 | 400 | 0 | 0 | 0 | 0 | 100.0 % | 100.0 % | processed |
output_tllq4fNoSchanWNoHiggs0p_dim6TopMay20GST_all22WCsStartPtCheck_run5_UL17 | 0 | 200 000 | 200 000 | 400 | 400 | 400 | 400 | 0 | 0 | 0 | 0 | 100.0 % | 100.0 % | processed |
output_tllq4fNoSchanWNoHiggs0p_dim6TopMay20GST_all22WCsStartPtCheck_run4_UL17 | 0 | 200 000 | 200 000 | 400 | 400 | 400 | 400 | 0 | 0 | 0 | 0 | 100.0 % | 100.0 % | processed |
output_tllq4fNoSchanWNoHiggs0p_dim6TopMay20GST_all22WCsStartPtCheck_run3_UL17 | 0 | 200 000 | 200 000 | 400 | 400 | 400 | 400 | 0 | 0 | 0 | 0 | 100.0 % | 100.0 % | processed |
output_tllq4fNoSchanWNoHiggs0p_dim6TopMay20GST_all22WCsStartPtCheck_run2_UL17 | 0 | 201 000 | 201 000 | 402 | 402 | 402 | 402 | 0 | 0 | 0 | 0 | 100.0 % | 100.0 % | processed |
output_tllq4fNoSchanWNoHiggs0p_dim6TopMay20GST_all22WCsStartPtCheck_run1_UL17 | 0 | 200 500 | 200 500 | 401 | 401 | 401 | 401 | 0 | 0 | 0 | 0 | 100.0 % | 100.0 % | processed |
output_tllq4fNoSchanWNoHiggs0p_dim6TopMay20GST_all22WCsStartPtCheck_run0_UL17 | 0 | 200 500 | 200 500 | 401 | 401 | 401 | 401 | 0 | 0 | 0 | 0 | 100.0 % | 100.0 % | processed |
output_ttlnuJet_dim6TopMay20GST_all22WCsStartPtCheck_run4_UL17 | 0 | 200 613 | 200 613 | 881 | 881 | 881 | 881 | 0 | 0 | 0 | 0 | 100.0 % | 100.0 % | processed |
output_ttbarJet_dim6TopMay20GST_all22WCsStartPtCheck_run6_UL17 | 0 | 290 375 | 290 375 | 1 401 | 1 401 | 1 401 | 1 401 | 0 | 0 | 0 | 0 | 100.0 % | 100.0 % | processed |
output_ttbarJet_dim6TopMay20GST_all22WCsStartPtCheck_run5_UL17 | 0 | 315 659 | 315 659 | 1 402 | 1 402 | 1 402 | 1 402 | 0 | 0 | 0 | 0 | 100.0 % | 100.0 % | processed |
output_ttbarJet_dim6TopMay20GST_all22WCsStartPtCheck_run4_UL17 | 0 | 172 810 | 172 810 | 1 402 | 1 402 | 1 402 | 1 402 | 0 | 0 | 0 | 0 | 100.0 % | 100.0 % | processed |
output_ttbarJet_dim6TopMay20GST_all22WCsStartPtCheck_run3_UL17 | 0 | 172 886 | 172 886 | 1 403 | 1 403 | 1 403 | 1 403 | 0 | 0 | 0 | 0 | 100.0 % | 100.0 % | processed |
output_ttbarJet_dim6TopMay20GST_all22WCsStartPtCheck_run2_UL17 | 0 | 179 051 | 179 051 | 1 403 | 1 403 | 1 403 | 1 403 | 0 | 0 | 0 | 0 | 100.0 % | 100.0 % | processed |
output_ttbarJet_dim6TopMay20GST_all22WCsStartPtCheck_run1_UL17 | 0 | 202 604 | 202 604 | 1 402 | 1 402 | 1 402 | 1 402 | 0 | 0 | 0 | 0 | 100.0 % | 100.0 % | processed |
output_ttbarJet_dim6TopMay20GST_all22WCsStartPtCheck_run0_UL17 | 0 | 234 377 | 234 377 | 1 402 | 1 402 | 1 402 | 1 402 | 0 | 0 | 0 | 0 | 100.0 % | 100.0 % | processed |
output_ttHJet_dim6TopMay20GST_all22WCsStartPtCheck_run1_UL17 | 0 | 258 137 | 258 137 | 1 402 | 1 402 | 1 402 | 1 402 | 0 | 0 | 0 | 0 | 100.0 % | 100.0 % | processed |
output_ttlnuJet_dim6TopMay20GST_all22WCsStartPtCheck_run6_UL17 | 0 | 187 204 | 187 204 | 882 | 882 | 882 | 0 | 0 | 0 | 0 | 0 | 100.0 % | 0.0 % | processed |
output_ttHJet_dim6TopMay20GST_all22WCsStartPtCheck_run0_UL17 | 0 | 249 677 | 249 677 | 1 401 | 1 401 | 1 401 | 1 401 | 0 | 0 | 0 | 0 | 100.0 % | 100.0 % | processed |
output_ttHJet_dim6TopMay20GST_all22WCsStartPtCheck_run6_UL17 | 0 | 298 715 | 298 715 | 1 402 | 1 402 | 1 402 | 1 402 | 0 | 0 | 0 | 0 | 100.0 % | 100.0 % | processed |
output_ttlnuJet_dim6TopMay20GST_all22WCsStartPtCheck_run5_UL17 | 0 | 188 839 | 188 839 | 882 | 882 | 882 | 882 | 0 | 0 | 0 | 0 | 100.0 % | 100.0 % | processed |
output_ttlnuJet_dim6TopMay20GST_all22WCsStartPtCheck_run0_UL17 | 0 | 214 096 | 214 096 | 881 | 881 | 881 | 881 | 0 | 0 | 0 | 0 | 100.0 % | 100.0 % | processed |
output_ttlnuJet_dim6TopMay20GST_all22WCsStartPtCheck_run3_UL17 | 0 | 206 387 | 206 387 | 881 | 881 | 881 | 881 | 0 | 0 | 0 | 0 | 100.0 % | 100.0 % | processed |
output_ttlnuJet_dim6TopMay20GST_all22WCsStartPtCheck_run2_UL17 | 0 | 209 430 | 209 430 | 881 | 881 | 881 | 881 | 0 | 0 | 0 | 0 | 100.0 % | 100.0 % | processed |
output_ttlnuJet_dim6TopMay20GST_all22WCsStartPtCheck_run1_UL17 | 0 | 210 870 | 210 870 | 881 | 881 | 881 | 881 | 0 | 0 | 0 | 0 | 100.0 % | 100.0 % | processed |
output_ttllNuNuJetNoHiggs_dim6TopMay20GST_all22WCsStartPtCheck_run6_UL17 | 0 | 302 006 | 302 006 | 1 481 | 1 481 | 1 481 | 1 481 | 0 | 0 | 0 | 0 | 100.0 % | 100.0 % | processed |
output_ttllNuNuJetNoHiggs_dim6TopMay20GST_all22WCsStartPtCheck_run3_UL17 | 0 | 223 788 | 223 788 | 1 482 | 1 482 | 1 482 | 1 482 | 0 | 0 | 0 | 0 | 100.0 % | 100.0 % | processed |
output_ttllNuNuJetNoHiggs_dim6TopMay20GST_all22WCsStartPtCheck_run2_UL17 | 0 | 226 429 | 226 429 | 1 482 | 1 482 | 1 482 | 1 482 | 0 | 0 | 0 | 0 | 100.0 % | 100.0 % | processed |
output_ttllNuNuJetNoHiggs_dim6TopMay20GST_all22WCsStartPtCheck_run1_UL17 | 0 | 227 215 | 227 215 | 1 482 | 1 482 | 1 482 | 1 482 | 0 | 0 | 0 | 0 | 100.0 % | 100.0 % | processed |
output_ttllNuNuJetNoHiggs_dim6TopMay20GST_all22WCsStartPtCheck_run0_UL17 | 0 | 228 929 | 228 929 | 1 482 | 1 482 | 1 482 | 1 482 | 0 | 0 | 0 | 0 | 100.0 % | 100.0 % | processed |
output_ttHJet_dim6TopMay20GST_all22WCsStartPtCheck_run4_UL17 | 0 | 260 871 | 260 871 | 1 403 | 1 403 | 1 403 | 1 403 | 0 | 0 | 0 | 0 | 100.0 % | 100.0 % | processed |
output_ttllNuNuJetNoHiggs_dim6TopMay20GST_all22WCsStartPtCheck_run5_UL17 | 0 | 312 283 | 312 283 | 1 481 | 1 481 | 1 481 | 1 481 | 0 | 0 | 0 | 0 | 100.0 % | 100.0 % | processed |
output_ttllNuNuJetNoHiggs_dim6TopMay20GST_all22WCsStartPtCheck_run4_UL17 | 0 | 206 229 | 206 229 | 1 480 | 1 480 | 1 480 | 1 480 | 0 | 0 | 0 | 0 | 100.0 % | 100.0 % | processed |
output_ttHJet_dim6TopMay20GST_all22WCsStartPtCheck_run5_UL17 | 0 | 309 662 | 309 662 | 1 401 | 1 401 | 1 401 | 1 401 | 0 | 0 | 0 | 0 | 100.0 % | 100.0 % | processed |
output_ttHJet_dim6TopMay20GST_all22WCsStartPtCheck_run3_UL17 | 0 | 262 867 | 262 867 | 1 401 | 1 401 | 1 401 | 1 401 | 0 | 0 | 0 | 0 | 100.0 % | 100.0 % | processed |
output_tHq4f_dim6TopMay20GST_all22WCsStartPtCheck_run6_UL17 | 0 | 200 000 | 200 000 | 400 | 400 | 400 | 400 | 0 | 0 | 0 | 0 | 100.0 % | 100.0 % | processed |
output_tHq4f_dim6TopMay20GST_all22WCsStartPtCheck_run5_UL17 | 0 | 200 000 | 200 000 | 400 | 400 | 400 | 400 | 0 | 0 | 0 | 0 | 100.0 % | 100.0 % | processed |
output_tHq4f_dim6TopMay20GST_all22WCsStartPtCheck_run4_UL17 | 0 | 200 000 | 200 000 | 400 | 400 | 400 | 400 | 0 | 0 | 0 | 0 | 100.0 % | 100.0 % | processed |
output_tHq4f_dim6TopMay20GST_all22WCsStartPtCheck_run3_UL17 | 0 | 200 500 | 200 500 | 401 | 401 | 401 | 401 | 0 | 0 | 0 | 0 | 100.0 % | 100.0 % | processed |
output_tHq4f_dim6TopMay20GST_all22WCsStartPtCheck_run2_UL17 | 0 | 200 500 | 200 500 | 401 | 401 | 401 | 401 | 0 | 0 | 0 | 0 | 100.0 % | 100.0 % | processed |
output_tHq4f_dim6TopMay20GST_all22WCsStartPtCheck_run1_UL17 | 0 | 201 000 | 201 000 | 402 | 402 | 402 | 402 | 0 | 0 | 0 | 0 | 100.0 % | 100.0 % | processed |
output_tHq4f_dim6TopMay20GST_all22WCsStartPtCheck_run0_UL17 | 0 | 200 500 | 200 500 | 401 | 401 | 401 | 401 | 0 | 0 | 0 | 0 | 100.0 % | 100.0 % | processed |
Total | 0 | 9 418 795 | 9 418 795 | 41 776 | 41 776 | 41 776 | 40 894 | 0 | 0 | 0 | 0 | 100.0 % | 97.9 % |
Protocol | Stage-in Success | Stage-in Failure | Stageout Success | Stageout Failure |
---|---|---|---|---|
hdfs | 41818 | 0 | 17182 | 2 |
statisticsprofile show timeline breakdown
No successful merge tasks yet!
A mapping of the exit codes can be found in the documentation.
Exit code | Count | Samples | |||||||||
---|---|---|---|---|---|---|---|---|---|---|---|
1 | 21 | 8722 | 8721 | 8720 | 8719 | 8718 | 8717 | 8716 | 8715 | 8714 | 8713 |
10040 | 109 | 8355 | 8354 | 8348 | 8174 | 8173 | 8097 | 8070 | 8069 | 8064 | 7992 |
Hostname | Exit Codes | ||
---|---|---|---|
All | 10040 | 1 | |
d12chas581.crc.nd.edu | 19 | 4 | 15 |
d12chas549.crc.nd.edu | 7 | 6 | 1 |
d12chas565.crc.nd.edu | 7 | 7 | 0 |
d12chas577.crc.nd.edu | 7 | 7 | 0 |
d12chas562.crc.nd.edu | 7 | 7 | 0 |
d12chas572.crc.nd.edu | 5 | 5 | 0 |
d12chas588.crc.nd.edu | 5 | 5 | 0 |
d12chas576.crc.nd.edu | 5 | 4 | 1 |
d12chas544.crc.nd.edu | 4 | 3 | 1 |
d12chas561.crc.nd.edu | 4 | 4 | 0 |